Agilent Technologies - N4903B

Key Specifications

• Data rates 150 Mb/s to 7 Gb/s pattern generator and error detector.
• >0.5 UI calibrated, compliant and integrated jitter injection: RJ, RJ-LF, RJ-HF, PJ1, PJ2, SJ, BUJ, ISI, sinusoidal interference, triangular and arbitrary SSC and residual SSC
• Excellent signal performance and sensitivity
• Built-in clock data recovery with tunable and compliant loop bandwidth
• Half-rate clocking with variable duty cycle for forwarded clocked devices
• Measures BER, BERT Scan, TJ with RJ/DJ separation, eye diagram, eye mask, BER contour, automated jitter tolerance, pattern capture symbol error ratio (SER) of coded and retimed data streams
• Two adjustable data outputs with independent PRBS and pattern with 120 block pattern sequencer

Description
Ideal choice for R&D and validation teams characterizing and stressing chips and transceiver modules that have serial I/O ports up to 7 Gb/s. It can characterize a receiver’s jitter tolerance and is designed to prove compliance to today’s most popular serial bus standards, such as:

• PCI Express®
• SATA/SAS
• DisplayPort
• USB SuperSpeed
• Fibre Channel
• QPI
• HyperTransport
• Memory buses, such as fully buffered DIMM2
• Backplanes, such as CEI
• XFP/XFI, SFP+